Analysis on the causes of reducing IC chip welding holes and defects in SMT welding process


Hardware PCBA electronic products welding into lead-free process, due to the characteristics of lead-free solder, such as high melting point, poor wettability, narrow process window, etc., the welding process has the unique defects and defects of lead-free welding, such as tin bead, solder spot rough, solder leakage and less tin, and void.Voids are known to form when welding large plane and low foot height components, such as QFN components.The use of these components is increasing, and cavity formation to meet IPC standards is causing headaches for many PCB board designers, PCBA welding EMS contractors and quality control personnel.The parameters for optimizing void properties are usually paste chemistry, reflow temperature curves, substrate and component finishes, and pad and SMT stencil optimization.In practice, however, changing these parameters has obvious limitations, and despite many efforts at optimization, high voidrate levels are often seen.▲ (IC chip welding hole of different degrees) the root cause of welding hole for solder paste after melting wrapped in the air or volatile gas is not completely discharged, affecting factors including solder paste material, solder paste printing shape, solder paste printing quantity, reflux temperature, reflux time, welding size, structure, etc.Recently, in response to the “Us Department of Commerce’s comprehensive restrictions on Huawei’s purchase of IC chip semiconductors produced with American software and technology” event, Huawei issued a statement through the heartfelt community: “Without scars, rough skin thick flesh, heroes have suffered many hardships since ancient times.Look back, rugged;Look ahead and never give up.As a SMT electronic manufacturing engineer, if you don’t master the SMT surface mount assembly process, it is difficult to go to analysis and improve process, and understand before assembly process, need to master the surface encapsulation structure of assembly components, next we construct for encapsulation structure and assembly process analysis two parts in detail.Surface assembly components (SMD) packaging is the object of surface assembly, understanding the PACKAGING structure of SMD is of great significance to optimize SMT process.The package structure of SMD is the basis of the process design, so we do not classify the package name here but by the structure of the pin or solder end.According to this classification, the packaging of SMD mainly includes Chip, J-pin, L-pin, BGA, BTC and castle, as shown in the figure below.Electronic components SMD packaging classification BGA category packaging introduction:1. BGA package (Ball Grid Array). According to its structure, there are mainly four categories: Plastic BGA (P-BGA), flip BGA (F-BGA), carrier BGA (T-BGA) and ceramic BGA (C-BGA), as shown in the figure below.BTC package introduction:BTC(Bottom Terminal Component) is widely used on the circuit board, such as welding ball array device (BGA/CSP/WLP/POP), QFN/LLP and other special devices.BTC package The BTC package forms listed in IPC-7093 include QFN (Quad Flat No-lead Package), SON (SmallOutline no-lead), DFN (Dual Flat No-lead), and LGA (Land)Grid Array) and Micro Leadframe Package (MLFP), as shown in the following figure.Among them, QFN is a pin less package, which is square or rectangular. There is a large exposed pad in the center of the bottom of the package for heat conduction, and electrical connection is realized by conducting the pads around the periphery of the package of the big pad.This type of packaging is increasingly used in the electronics industry due to its lack of pins, smaller area of mount than QFP, and lower height than QFP, coupled with outstanding electrical and thermal properties.QFN hot sink pad cavity control is one of the difficult problems in QFN welding process and the industry.3d section view and physical appearance of QFN components Due to the increasing ability of small size packages to carry high power chips, bottom-end component packages like QFN are increasingly important.With the increasing demand for reliability performance, optimizing thermal and electrical performance is critical for packaged power management components like QFN.In addition, to maximize speed and rf performance, cavity reduction is important to reduce the current path of the circuit.As package sizes shrink and power requirements increase, the market demands to reduce voiding under the hot pads of QFN components, so the key process factors that generate voiding must be evaluated and the best solution designed.QFN package has excellent thermal performance, mainly because there is a large area of heat dissipation pad at the bottom of the package. In order to effectively transfer heat from the chip to the PCB, the corresponding heat dissipation pad and heat dissipation hole must be designed at the bottom of the PCB. The heat dissipation pad provides a reliable welding area, and the heat dissipation hole provides a way of heat dissipation.Therefore, when the chip at the bottom of the exposure bonding pad and thermal bonding pad on the PCB during welding, the large size hot hole and the bonding pad on the gases in the solder paste to spill, will produce certain gas hole, for the SMT process, will produce larger hole, in order to eliminate these pores is almost impossible, only the pores to minimize the amount.The full name of LGA is “Land Grid Array”, or “planar grid array package”, that is, the package of electrode contacts of array state tank is made on the bottom surface. Its shape is very similar to that of BGA components. Because the size of its pad is about 2-3 times larger than the diameter of BGA ball, it is also difficult to control the cavity.And it is the same as QFN components, the industry has not developed the relevant process standards, which to a certain extent to the electronic processing industry.The full name of BGA is “Ball Grid Array”, or “Ball Grid Array package”.At present, most Intel mobile cpus use this packaging method, such as all Intel processors ending in H, HQ, U, Y (including but not limited to low voltage).BGA can be the extreme product of LGA and PGA. Unlike their characteristics that can be replaced at will, it is impossible for ordinary players to disassemble and replace BGA in a normal way once it is packaged, except through professional instruments. However, because it is made at one time, BGA can be made shorter and smaller.The main defects of BGA chip solder spot are: cavity, diswelding (open), bridge (short circuit), internal crack of solder ball, solder spot disturbance, cold welding, incomplete melting of solder ball, displacement (solder ball is not aligned with PCB pad), solder ball, etc.Factors affecting BGA cavity: When BGA forms solder joints in the welding process, it generally goes through the process of secondary collapse.In the first process, the solder paste melts and the component collapses.The second process is that the solder ball also melts and collapses again, eventually forming an oblate spot.From the actual situation, the spot cavity is mostly located between the bottom of the ball and the pad, which is more affected by flux volatilization in the welding process. Therefore, the process curve and solder paste are the two most important factors affecting the formation of spot cavity.The probability of voids in BGA region is generally higher.PCB design, solder selection, welding process (especially lead-free and mixed packaging process), reflux atmosphere (vacuum furnace and nitrogen), reflux parameters, etc., all have varying degrees of influence on the formation and control of cavity.”This article is reprinted from the network, copyright belongs to the original author, if there is infringement, please contact delete”

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